Digital Electronics: A Step-By-Step Guide To Mastery
Published 4/2024
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English
| Size: 42.63 GB[/align]
| Duration: 44h 42m
Learn Digital Electronics from Fundamentals to Advanced concept with 15+ years of experienced Faculty
[b]What you'll learn[/b]
Number System
Boolean Algebra
Logic Gates
Combinational Circuits
Karnaugh Map
Logic Families
Sequential Circuits
Semiconductor Memory
Analog to Digital Converter
Digital to Analog Converter
Can be able to solve most of Digital Electronics Problems
[b]Requirements[/b]
There is not specific requirements. You will get all the basics step by step.
[b]Description[/b]
This Digital Electronics course is specially designed for students who want to enter the field of Embedded systems, VLSI, and other branches of Computer Science. It is also helpful for working professionals. This is a unique course in the online marketplace.This course applies to many branches of Degree/Diploma Engineering such as Electrical, EC, Computer, IT, and Instrumentation. After completing this course students will be able to understand from basic to advance level concepts of Digital Electronics which will be a stepping stone for starting many lucrative career fields.This course is also helpful in many competitive examinations and not only that it will also be helpful in interviews.This course covers the following topics.- Number Representations: binary, hex, octal, decimal, BCD, integer, and floating-point- numbers and many more.- Boolean Algebra: Laws of B.A, SOP, POS, Minterms, Maxterms, Quine McCluskey Technique- Combinatorial circuits: Minimization of functions using Boolean identities and many other circuits like converters, multiplexers, decoders etc.- Karnaugh Map: Prime Implicants, 3,4,5 and 6 variable K Map- Logic Gates: AND, OR, NOT, XOR, XNOR, NAND and NOR- Logic Families: DTL, RTL, TTL, CMOS, Boolean Function Implementations- Sequential Circuits: Flip Flops, Counters, Shift Registers, State Machines- Memory: ROM, RAM, PLA, PAL, DAC, ADCSo, go through this entire course step by step and I am sure you will get thorough knowledge about the course of Digital Electronics.All the best..
Overview
Section 1: Course Introduction
Lecture 1 Introduction
Section 2: Number System
Lecture 2 Representation of Number Systems and Basics of Number System
Lecture 3 Addition operation in Different Number systems
Lecture 4 Subtraction operation in Different Number Systems
Lecture 5 Octal and Binary Multiplication, Number System Multiplication
Lecture 6 Decimal to Binary Conversion, Decimal to Binary Conversion Process
Lecture 7 Decimal to Octal Conversion, Decimal to Octal Conversion Process
Lecture 8 Decimal to Hexadecimal Conversion, Decimal to Hexadecimal Conversion Process
Lecture 9 Octal, Binary and Hexadecimal to Decimal conversion and Visa Versa
Lecture 10 Hexadecimal to Binary to Octal conversion and Visa versa
Lecture 11 X Number System to Y Number System conversion, Number System Conversion
Lecture 12 1's & 2's Compliment, 7's & 8's Compliment, 9's & 10's Compliment 15's,16's
Lecture 13 Simple Signed Representation, Example and Block Diagram of Simple Signed Rep
Lecture 14 1's compliment signed Representation and 2's compliment signed Repr.
Lecture 15 2's compliment signed Representation
Lecture 16 1's compliment signed Representation
Lecture 17 Shortcut Method to find 2's compliment, 2's Compliment
Lecture 18 Binary Subtraction using 1's compliment
Lecture 19 Binary Subtraction using 2's compliment
Lecture 20 Classification of Codes (Definition, Weighted, Non Weighted
Lecture 21 BCD code, Binary Coded Decimal Code, Binary and BCD Comparison
Lecture 22 BCD Addition, BCD Addition Rules, BCD Addition Examples
Lecture 23 BCD to Binary conversion, BCD to Binary conversion Process
Lecture 24 Binary to BCD conversion, Process of Binary to BCD conversion, Binary to BCD
Lecture 25 2421 BCD code and 2_421 BCD code, Self Complimentary Property of 2421 BCD
Lecture 26 Excess 3 Code, Excess 3 Code Properties, Decimal to Excess 3 Code Conversion
Lecture 27 Excess 3 Addition, Excess 3 Addition Process, Excess 3 Addition Examples
Lecture 28 Identification of Base or Radix of given number, Radix Identification
Lecture 29 ASCII code, American Standard Code for Information Interchange
Lecture 30 Gray Code (Basics & Properties), Gray Code as self reflection code, Gray Cod
Lecture 31 Binary to Gray code conversion, Binary to Gray code conversion process
Lecture 32 Gray to Binary Code conversion, Gray to Binary Code conversion process
Lecture 33 Identification of self complimenting code, Digital Electronics
Lecture 34 Total bits required to represent a number
Lecture 35 Minimal Decimal Equivalent, Minimal Decimal Equivalent Examples
Lecture 36 Hamming Code Basics, Number of Parity bits in Hamming code
Lecture 37 Hamming Code generation, Position of Parity bits
Lecture 38 Hamming Code error detection and Hamming Code error correction
Lecture 39 IEEE 754 floating point single precision 32 bit format
Lecture 40 IEEE 754 floating point double precision 64 bit format
Section 3: Boolean Algebra
Lecture 41 De Morgen's Theorem and Proof of De Morgen's Theorem
Lecture 42 Boolean Algebra Rules (Distributive, Commutative, Associative, De Morgen's)
Lecture 43 Consensus Theorem and Proof of Consensus Theorem
Lecture 44 Boolean Algebra Examples part 1, Boolean Algebra, Boolean Algebra Rules
Lecture 45 Boolean Algebra Examples Part 2, Boolean Algebra, Boolean Algebra Rules
Lecture 46 Boolean Algebra examples part 3, Boolean Algebra, Boolean Algebra Rules
Lecture 47 Dual and Self Dual of Boolean equation, Boolean Algebra
Lecture 48 SOP - Sum Of Product, POS - Product Of Sum and Canonical Form
Lecture 49 Minterms and Maxterms in Boolean function Representation
Lecture 50 SOP to SSOP conversion, Sum Of Product to Standard Sum Of Product Conversion
Lecture 51 POS to SPOS conversion, Product Of Sum to Standard Product Of Sum Conversion
Lecture 52 SSOP to SPOS conversion and SPOS to SSOP conversion
Lecture 53 Examples on SOP and POS, Boolean Algebra in Digital Electronicss
Lecture 54 Quine Mccluskey Minimization Technique for Boolean expression, Karnaugh Map
Section 4: Logic Gates
Lecture 55 Logic GATE's Introduction, Basic Logic GATE's, Universal Logic GATE
Lecture 56 NOT gate, NOT gate Applications, NOT gate as ring oscillator, NOT gate
Lecture 57 AND gate, Properties of AND gate and Examples of AND gate, Logic Gate's
Lecture 58 OR gate, Properties of OR gate and Examples of OR gate, Logic Gate's
Lecture 59 NAND as universal GATE, Logic GATEs in Digital Electronics
Lecture 60 XOR gate and XNOR gate, Properties of XOR and XNOR gate in Logic GATE'S
Lecture 61 Examples on XOR and XNOR gate part 1, Logic GATEs in Digital Electronics
Lecture 62 Examples on XOR and XNOR gate Part 2, Logic GATEs in Digital Electronics
Lecture 63 NOR as universal GATE, Logic GATEs in Digital Electronics
Lecture 64 NAND gate and NOR Gate in Logic Gate's
Lecture 65 Minimum Two input NAND for multiple input AND & Minimum Two input NAND
Lecture 66 Minimum two input NAND gates for Boolean expression
Lecture 67 Minimum two input NAND gates for Boolean equation
Lecture 68 Boolean expression to NAND gate implementation
Lecture 69 AOI to NAND gate implementation, Logic GATEs in Digital Electronics
Lecture 70 Boolean expression to NOR gate implementation
Lecture 71 AOI to NOR implementation, Logic GATEs in Digital Electronics
Lecture 72 Stuck at 1 and Stuck at 0 fault in Logic circuit
Section 5: Combinational Circuits
Lecture 73 Combinational circuit and Sequential circuit Comparison
Lecture 74 Combinational circuit designing examples
Lecture 75 Combinational circuit examples, Combinational circuit
Lecture 76 Half Adder (Working, Truth Table, Designing & Circuit)
Lecture 77 Full Adder (Working, Truth Table, Designing & Circuit)
Lecture 78 Full Adder using Half Adder (Designing and Circuit)
Lecture 79 Half Adder using NAND gates, Half Adder
Lecture 80 4 bits parallel Adder (Working and Circuit)
Lecture 81 BCD Adder by Parallel Adder (Truth Table, Working, Designing and Circuit)
Lecture 82 1's Compliment Subtraction using Parallel Adder
Lecture 83 2's Compliment Subtraction using Parallel Adder
Lecture 84 Half Subtractor (Working, Truth Table and Circuit)
Lecture 85 Half Adder using Half Subtractor
Lecture 86 Half Subtractor using Half Adder
Lecture 87 Full Adder using Half Subtractor, Combinational circuit
Lecture 88 Full Subtractor (Working, Truth Table and Circuit)
Lecture 89 Full Subtractor using Full Adder
Lecture 90 Full Adder using Full Subtractor
Lecture 91 Full Subtractor using Half Subtractor,
Lecture 92 Parallel Subtractor using Full Subtractor and Half Subtractor
Lecture 93 Bits Multiplier using Half Adder
Lecture 94 Excess 3 Addition by Parallel Adder, Combinational circuit
Lecture 95 2 bits Data comparator, Combinational circuit in Digital Electronics
Lecture 96 Seven Segments Display Decoder, Combinational circuit in Digital Electronics
Lecture 97 Carry Look Ahead Adder, CLA Adder, Combinational circuit in Digital Electron
Lecture 98 Even Parity Generator and Odd Parity Generator
Lecture 99 Decoder Basics and 2 to 4 Decoder
Lecture 100 3 to 8 Decoder working, Truth Table and Circuit Diagram
Lecture 101 Combinational Circuit Output Waveforms with Delay at Gates
Lecture 102 Combinational Circuit Output Waveforms with Delay at Gates
Lecture 103 Priority Encoder Basics, Working, Truth Table and Circuit
Lecture 104 Decimal to BCD Encoder Basics, Working, Truth Table
Lecture 105 Implementation of Full Adder using Decoder
Lecture 106 Binary Code to Gray Code Converter
Lecture 107 Multiplexer MUX Basics, Working, Advantages, Applications and Types
Lecture 108 2 to 1 Multiplexer Working, Truth Table and Circuit
Lecture 109 4 to 1 Multiplexer (Working, Truth Table and Circuit), Combinational circuit
Lecture 110 8 to 1 Multiplexer using Full Subtractor
Lecture 111 MUX Tree, Multiplexer Tree
Lecture 112 Designing of 4 to 1 Multiplexer using 2 to 1 Multiplexer
Lecture 113 Designing of 8 to 1 Multiplexer using 2 to 1 Multiplexer
Lecture 114 8 to 1 MUX using 4 to 1 MUX by two different Methods
Lecture 115 SOP Implementation using Multiplexer
Lecture 116 Full Adder Implementation using 4 to 1 Multiplexer
Lecture 117 Full Adder using 2 to 1 Multiplexer,
Lecture 118 Identification of Boolean Expression from Multiplexer Circuit
Lecture 119 Identification of logic Gate's from Multiplexer circuit
Lecture 120 Examples Based on Multiplexer, Combinational circuit in Digital Electronics
Lecture 121 Examples Based on Multiplexer, Combinational circuit ,
Lecture 122 Coincidence Logic and Problems based on Coincidence Logic
Lecture 123 Demultiplexer and 1 to 2 Demultiplexer
Lecture 124 1 to 4 Demultiplexer Working
Lecture 125 1 to 8 Demultiplexer Working
Lecture 126 Implementation of Full Subtractor using 1 to 8 Demultiplexer
Lecture 127 Demultiplexer as Decoder _ Combinational circuit
Lecture 128 Implementation of Boolean Expression using Demultiplexer
Section 6: Karnaugh Map
Lecture 129 Karnaugh Map basics & Key points of Karnaugh Map
Lecture 130 K Map rules for grouping cells, K map rules for formation of Boolean fun.
Lecture 131 Implicants, Prime Implicants and Essential Prime Implicants
Lecture 132 K Map Examples, Karnaugh Map Examples, K Map
Lecture 133 K Map Examples
Lecture 134 K Map with Don't care examples
Lecture 135 K Map with Don't care examples
Lecture 136 K Map for POS expression
Lecture 137 5 variable K Map, 5 variable Karnaugh
Lecture 138 6 variable K Map
Lecture 139 K Map Examples
Lecture 140 Quine McCluskey Minimization Technique
Section 7: Logic Families
Lecture 141 Digital Logic Families, Classifications of Digital Logic Families
Lecture 142 Merits, Demerits and Characteristics of Digital IC
Lecture 143 Propagation Delay, Threshold Voltage, Power Dissipation & Figure of Merits
Lecture 144 Fan out, Fan in and Operating Temperature of IC
Lecture 145 Voltage and Current Parameters, Noise Margin
Lecture 146 Resistor Transistor Logic RTL, RTL NOT Gate, RTL NOR Gate
Lecture 147 Diode Transistor Logic DTL, DTL NAND Gate, Components Details of DTL
Lecture 148 Transistor Transistor Logic TTL, TTL NAND Circuit, TTL NAND Gate Working
Lecture 149 TTL NAND Gate with Totem Pole Output, Circuit & Working of TTL NAND Gate
Lecture 150 TTL NOR Gate with Totem Pole Output
Lecture 151 TTL Open Collector NAND Gate
Lecture 152 TTL Tristate Logic
Lecture 153 CMOS logic circuit rules
Lecture 154 CMOS NAND Gate
Lecture 155 CMOS NOR Gate
Lecture 156 Boolean Function implementation using CMOS
Lecture 157 CMOS Multiplexer
Lecture 158 CMOS Half Adder
Lecture 159 Boolean Function Implementation using CMOS
Lecture 160 CMOS SR Latch using NOR Gates
Lecture 161 CMOS SR Latch using NAND Gates
Lecture 162 CMOS D Latch, CMOS D Latch Circuit
Lecture 163 CMOS SR Flip Flop using NOR Gates
Lecture 164 CMOS JK Flip Flop using NOR Gates
Lecture 165 Stick Diagram of CMOS NOR Gate
Lecture 166 Stick Diagram of CMOS NAND Gate
Lecture 167 Stick Diagram of Boolean Function
Lecture 168 CMOS Transmission Gate
Lecture 169 Multiplexer Implementation using Transmission Gates
Lecture 170 D Latch Implementation using Transmission Gate
Lecture 171 Boolean Function Implementation using Transmission Gates
Section 8: Sequential Circuits
Lecture 172 Sequential circuit (Basics, Block Diagram, Classification and Examples)
Lecture 173 Clock and Triggering by clock in Sequential circuit
Lecture 174 Difference between Latch and Flip Flop
Lecture 175 SR Latch by NOR gates
Lecture 176 SR Latch using NAND gates
Lecture 177 Truth Table, Characteristic Table and Excitation Table of Flip Flop
Lecture 178 SR Flip Flop or Set Reset Flip Flop
Lecture 179 D Flip Flop or Data Flip Flop Circuit
Lecture 180 JK Flip Flop Circuit, Working, Truth Table, Characteristics Table
Lecture 181 Race Around Condition in JK Flip Flop
Lecture 182 Master Slave JK Flip Flop (Circuit, Working and Waveforms)
Lecture 183 T Flip Flop or Toggle Flip Flop
Lecture 184 Preset and Clear Input in Flip Flop
Lecture 185 R Flip Flop to D Flip Flop conversion
Lecture 186 SR Flip Flop to JK Flip Flop conversion
Lecture 187 SR Flip Flop to T Flip Flop conversion
Lecture 188 JK Flip Flop to D Flip Flop Conversion
Lecture 189 JK Flip Flop to T Flip Flop conversion
Lecture 190 D Flip Flop to T Flip Flop conversion
Lecture 191 D Flip Flop to JK Flip Flop conversion
Lecture 192 T Flip Flop to D Flip Flop Conversion
Lecture 193 T Flip Flop to JK Flip Flop conversion
Lecture 194 JK Flip Flop to SR Flip Flop
Lecture 195 Examples on Flip Flop
Lecture 196 Examples on Latch
Lecture 197 D Latch (Working, Circuit & Truth Table)
Lecture 198 Counter (Types, Classifications & Applications)
Lecture 199 Asynchronous Up Counter or Ripple Up Counter (Circuit, Working & Waveforms)
Lecture 200 Asynchronous Down Counter or Ripple Down Counter
Lecture 201 Modulo Counter by Asynchronous Counter
Lecture 202 2 bits Synchronous Counter using JK Flip Flop
Lecture 203 BCD Counter or Decade Counter or Modulo 10 Counter
Lecture 204 3 bits Synchronous Counter using T Flip Flop
Lecture 205 3 bits Synchronous Up Down Counter
Lecture 206 Ring Counter, Ring Counter Circuit
Lecture 207 Johnson's Counter - Twisted Ring Counter
Lecture 208 Arbitrary Sequence Counter
Lecture 209 Arbitrary Sequence Counter
Lecture 210 Sequence Generator
Lecture 211 Sequence Generator
Lecture 212 Examples of Counter
Lecture 213 Sequence Detector Example 1
Lecture 214 Sequence Detector Example 2
Lecture 215 Register Basics, Format and Classification
Lecture 216 SISO Shift Register, Serial Input Serial Output Shift Register
Lecture 217 SIPO Shift Register, Serial Input Parallel Output Shift Register
Lecture 218 PIPO Register, Storage Register, Buffer Register
Lecture 219 PISO Shift Register, Parallel Input Serial Output Shift Register
Lecture 220 Bidirectional Shift Register
Lecture 221 Universal Shift Register
Lecture 222 Examples based on Shift Register
Lecture 223 Moore State Machine and Example on Moore State Machine
Lecture 224 Mealy State Machine and Example on Mealy State Machine
Lecture 225 Comparison of Mealy State Machine and Moore State Machine
Section 9: Memory, ADC and DAC
Lecture 226 ROM-Read Only Memory (Basics, Structure, size and Classifications)
Lecture 227 RAM - Random Access Memory (Basics, Structure, size and Classifications)
Lecture 228 PLA - Programmable Logic Array (Basics, Structure, Designing and Programming
Lecture 229 PAL - Programmable Array Logic Basics, Structure, Designing and Programming)
Lecture 230 Binary Weighted Digital to Analog Converter DAC (Basics, Circuit and Working
Lecture 231 Example of Binary Weighted Digital to Analog Converter DAC
Lecture 232 R-2R ladder Digital to Analog Converter DAC (Voltage Switched Network)
Lecture 233 Example on R-2R Ladder Digital to Analog Convertor DAC
Lecture 234 R-2R Ladder Digital to Analog Convertor DAC (Current Switched Network)
Lecture 235 Counter Type ADC, Counter Type Analog to Digital Converter
Lecture 236 Tracking Type ADC, Tracking Type Analog to Digital Converter
Lecture 237 Successive Approximation Type ADC, Successive Approximation Type Analog to Dig.
Lecture 238 Flash ADC, Flash Analog to Digital Converter
Lecture 239 Half Flash ADC, Half Flash Analog to Digital Converter
Lecture 240 Dual Slope ADC, Dual Slope Analog to Digital Converter
Lecture 241 Sigma Delta ADC, Sigma Delta Digital to Analog Converter
Lecture 242 Examples on ADC
Section 10: Practical Session on Multisim
Lecture 243 Basic Logic Gates in Multisim Software
Lecture 244 Half Adder and Full Adder in Multisim
Lecture 245 Binary Code to Gray Code Conversion in Multisim
Lecture 246 One Bit Comparator in Multisim
Lecture 247 Multiplexer and Demultiplexer in Multisim Software
Lecture 248 Flip Flops in Multisim Software
Lecture 249 3 bits synchronous Counter using T Flip Flop in Multisim
Lecture 250 3 Bits Up Down Counter using Multisim Software
Lecture 251 SISO Shift Register using Multisim Software
Lecture 252 Sequence Generator in Multisim Software
Lecture 253 Digital Electronics Important Questions
Electronics and Telecommunication Engineering,Electrical Engineering,Computer Science Students,Diploma/Science Students,IT Professionals,Enthusiastic Learner
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